A wiring substrate is used as a chip carrier for electrical connections in semiconductor packaging. An IC chip during operation will generate heat which will accumulate and raise the temperature of the wiring substrate. After the IC chip is shut down, the wiring substrate will cool down and the temperature will drop to room temperature. As a matter of fact, the wiring substrate is under thermal cycles when an IC chip is turned on and off and during operation. Moreover, during these thermal cycles, thermal stresses will generate inside the wiring substrate where the traces are easily broken.
As shown in FIG. 1 and FIG. 2, a conventional wiring substrate 100 comprises a core layer 110 where a plurality of connecting pads 120 and a plurality of traces 130 covered by a solder resist 140 are formed on the core layer 110. The traces 130 are disposed on the core layer 110 and connect the corresponding connecting pads 120 to the internal via or internal connecting pads. The connecting pads 120 can be the external connecting pads of an IC package which can be placed with solder balls or printed with solder paste. The solder resist 140 covers the traces 130 with the connecting pads 120 partially exposed. Each trace 130 has a top surface 131 and a bottom surface 132 with rectangular cross sections. The bottom surfaces 132 of the traces 130 are attached to the core layer 110 of the substrate. Normally the top surfaces 131 and vertical sidewalls of the traces 130 are covered by the solder resist 140. The tensile strengths of the traces are related to the width of the bottom surfaces 132 of the traces 130. However, as the wiring density is increased, the widths of the traces 130 become smaller, i.e., the width of the bottom surfaces 131 of the traces 130 become smaller, poor tensile strengths of the traces 130 are expected which is confirmed by thermal cycle test, TCT. Broken circuits are found in some of the traces 130 in the wiring substrate 100 leading to electrical open.